Venkatesh Akella
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Person:5008678
List of research outcomes
This list is not complete and representing at the moment only items from zbMATH Open and arXiv. We are working on additional sources - please check back here soon!
| Publication | Date of Publication | Type |
|---|---|---|
| Efficient Configurable Decoder Architecture for Nonbinary Quasi-Cyclic LDPC Codes IEEE Transactions on Circuits and Systems I: Regular Papers | 2021-08-26 | Paper |
| Memory System Optimization for FPGA-Based Implementation of Quasi-Cyclic LDPC Codes Decoders IEEE Transactions on Circuits and Systems I: Regular Papers | 2021-08-26 | Paper |
| Hardware Implementation of a Backtracking-Based Reconfigurable Decoder for Lowering the Error Floor of Quasi-Cyclic LDPC Codes IEEE Transactions on Circuits and Systems I: Regular Papers | 2021-08-26 | Paper |
| PDG_GEN: A Methodology for Fast and Accurate Simulation of On-Chip Networks IEEE Transactions on Computers | 2017-06-20 | Paper |
Research outcomes over time
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