Xianlong Hong

Available identifiers

Publication	Date of Publication	Type
Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization	2017-11-20	Paper
A single layer zero skew clock routing in X architecture	2010-03-03	Paper
Application of optical proximity correction technology	2008-04-15	Paper
Reliable buffered clock tree routing algorithm with process variation tolerance	2007-02-20	Paper
Corner block list representation and its application with boundary constraints	2007-02-20	Paper
Legitimate skew clock routing with buffer insertion	2006-10-25	Paper
Preconditioned multi-zone boundary element analysis for fast 3D electric simulation	2005-08-05	Paper
https://portal.mardi4nfdi.de/entity/Q4825733	2004-11-05	Paper
CNB: a critical-network-based timing optimization method for standard cell global routing	2004-10-28	Paper
Determinstic VLSI block placement algorithm using less flexibility first principle	2004-10-28	Paper
An optimum placement search algorithm based on extended corner block list.	2004-07-01	Paper
https://portal.mardi4nfdi.de/entity/Q4466821	2004-06-08	Paper
FaSa: A fast and stable quadratic placement algorithm	2003-12-09	Paper
SSTT: Efficient local search for GSI global routing	2003-11-06	Paper
https://portal.mardi4nfdi.de/entity/Q4790484	2003-01-28	Paper
Floorplanning with abutment constraints based on corner block list	2002-07-15	Paper

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