Algorithm partition and parallel recognition of general context-free languages using fixed-size VLSI architecture

DOI10.1016/0031-3203(86)90003-8MaRDI QIDQ1084875zbMATH OpenOpenAlexFDO

Authors B. George

Publication date 1986

Published in Pattern Recognition (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0031-3203(86)90003-8

zbMATH Keywords

dynamic programmingcontext-free language recognition

Mathematics Subject Classification ID

Formal languages and automata (68Q45) Pattern recognition, speech recognition (68T10) Analysis of algorithms and problem complexity (68Q25) Dynamic programming (90C39) Algorithms in computer science (68W99)

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• scientific article; zbMATH DE number 3449757 (Why is no real title available?)
• A Theorem on Boolean Matrices
• A modification of Warshall's algorithm for the transitive closure of binary relations
• Algorithm partition and parallel recognition of general context-free languages using fixed-size VLSI architecture
• General context-free recognition in less than cubic time
• Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition
• Speed of Recognition of Context-Free Languages by Array Automata

Cited in

(4)

• VLSI architectures for string matching and pattern matching
• Efficient reconfigurable embedded parsers
• Parallel recognition and parsing on mesh connected computers with multiple broadcasting
• Algorithm partition and parallel recognition of general context-free languages using fixed-size VLSI architecture

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