Efficient reconfigurable embedded parsers

DOI10.1016/j.cl.2007.08.001zbMath1387.68148OpenAlexW1985482131MaRDI QIDQ1749233

Theodore Andronikos, Andrew Koulouris, Alexandros C. Dimopoulos, Christos Pavlatos, Ioannis Panagopoulos, George Papakonstantinou

Publication date: 16 May 2018

Published in: Computer Languages, Systems \& Structures (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.cl.2007.08.001

zbMATH Keywords

context-free grammarsFPGAsyntactic pattern recognitionreconfigurable parsers

Mathematics Subject Classification ID

Pattern recognition, speech recognition (68T10) Grammars and rewriting systems (68Q42)

Cites Work

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• Complexity of normal form grammars
• Algorithm partition and parallel recognition of general context-free languages using fixed-size VLSI architecture
• A parallel parsing algorithm for arbitrary context-free grammars
• Greibach normal form transformation revisited.
• Optimization of LR(k) parsers
• Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition
• An Improved Context-Free Recognizer
• A syntactic approach applied to materials degradation
• Methods and Applications of Artificial Intelligence
• Parallel recognition and parsing on the hypercube
• Recognition and parsing of context-free languages in time n3
• An efficient context-free parsing algorithm

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