Optimal three-dimensional layouts of complete binary trees

DOI10.1016/0020-0190(87)90045-7MaRDI QIDQ1099137zbMATH OpenOpenAlexFDO

Authors Ajay K. Gupta, Susanne E. Hambrusch

Publication date 1987

Published in Information Processing Letters (Search for Journal in Brave)

Full work available at URL https://docs.lib.purdue.edu/cgi/viewcontent.cgi?article=1523&context=cstech

zbMATH Keywords

areabinary treegraph layoutVLSIvolume

Mathematics Subject Classification ID

Trees (05C05) Planar graphs; geometric and topological aspects of graph theory (05C10) Graph theory (including graph drawing) in computer science (68R10) Applications of graph theory to circuits and networks (94C15)

Cites work

• scientific article; zbMATH DE number 3858396 (Why is no real title available?)
• Optimal three-dimensional VLSI layouts
• Three-Dimensional Circuit Layouts
• Three-Dimensional VLSI
• Universality considerations in VLSI circuits

Cited in

(1)

• Planar acyclic computation

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