Three-Dimensional VLSI

DOI10.1145/2402.322384MaRDI QIDQ3026917zbMATH OpenOpenAlexFDO

Authors Arnold L. Rosenberg

Publication date 1983

Published in Journal of the ACM (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1145/2402.322384

zbMATH Keywords

routinggraph embeddingslayoutpermutation networksFFT circuitsthree-dimensional circuit realizations

Mathematics Subject Classification ID

Graph theory (including graph drawing) in computer science (68R10) Applications of graph theory to circuits and networks (94C15)

Recommendations

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Cited in

(17)

• scientific article; zbMATH DE number 3845502 (Why is no real title available?)
• The techniques of Komolgorov and Bardzin for three-dimensional orthogonal graph drawings
• Routing vertex disjoint Steiner-trees in a cubic grid and connections to VLSI
• Optimal three-dimensional orthogonal graph drawing in the general position model.
• Optimal three-dimensional VLSI layouts
• Optimal three-dimensional layout of interconnection networks
• scientific article; zbMATH DE number 5657967 (Why is no real title available?)
• Three-dimensional orthogonal graph drawing algorithms
• Planar acyclic computation
• Complexities of layouts in three-dimensional VLSI circuits
• Optimal three-dimensional layouts of complete binary trees
• On the complexity of tree embedding problems
• Optimal multilayer channel routing with overlap
• Improved matrix triangularisation using a double pipeline systolic array
• Three-Dimensional Integrated Circuit Layout
• scientific article; zbMATH DE number 434571 (Why is no real title available?)
• Routing in a three-dimensional chip

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