Routing in a three-dimensional chip

DOI10.1109/12.368006MaRDI QIDQ4419608zbMATH OpenOpenAlexFDO

Authors Chao Tong Chi, Chuanlin Wu

Publication date 1995

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/12.368006

zbMATH Keywords

channel routing methodologyvery large scale integration technology

Mathematics Subject Classification ID

Computer system organization (68M99) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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(3)

• Three-Dimensional Circuit Layouts
• Three-Dimensional Integrated Circuit Layout
• VLSI design in the 3rd dimension

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