VLSI systems for band matrix multiplication

DOI10.1016/0167-8191(87)90024-XzbMATH Open0647.65029MaRDI QIDQ1104700FDOQ1104700

Authors: Kam Hoi Cheng, Sartaj Sahni 

Publication date: 1987

Published in: Parallel Computing (Search for Journal in Brave)

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zbMATH Keywords

effectivenessdesignsVLSI architecturesband matrix multiplicationnumber of processorsanalysis of performancesbus bandwidthdata movement stepserror diagnosissystolic systems

Mathematics Subject Classification ID

Theory of operating systems (68N25)

Cited In (4)

• Forty-three ways of systolic matrix multiplication
• VLSI implementation of fast solvers for band linear systems with constant coefficient matrix
• Title not available (Why is that?)
• Designing of processor-time optimal systolic arrays for band matrix-vector multiplication

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