A Robust Matrix-Multiplication Array

DOI10.1109/TC.1984.1676353MaRDI QIDQ3336684zbMATH OpenFDO

Authors Peter J. Varman, I. V. Ramakrishnan, Donald S. Fussell

Publication date 1984

Published in IEEE Transactions on Computers (Search for Journal in Brave)

zbMATH Keywords

time complexityrobust VLSI array processor for matrix multiplication

Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25) Applications of graph theory to circuits and networks (94C15) Theory of operating systems (68N25)

Recommendations

• scientific article; zbMATH DE number 3911707
• Optimal matrix multiplication on fault-tolerant VLSI arrays
• A class of fault-tolerant systolic arrays for matrix multiplication
• Modular matrix computations on multi-linear VLSI arrays
• Modular Matrix Multiplication on a Linear Array

Cited in

(6)

• An even faster systolic array for matrix multiplication
• scientific article; zbMATH DE number 3911707 (Why is no real title available?)
• Optimal matrix multiplication on fault-tolerant VLSI arrays
• Area-period tradeoffs for multiplication of rectangular matrices
• scientific article; zbMATH DE number 3890726 (Why is no real title available?)
• VLSI systems for band matrix multiplication

This page was built for publication: A Robust Matrix-Multiplication Array

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3336684)