VLSI-sorting evaluated under the linear model
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Publication:1117701
DOI10.1016/0885-064X(88)90014-3zbMath0667.68076MaRDI QIDQ1117701
Publication date: 1988
Published in: Journal of Complexity (Search for Journal in Brave)
Cites Work
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- The VLSI Complexity of Sorting
- Parallel Sorting with Serial Memories
- An Efficient Implementation of Batcher's Odd-Even Merge Algorithm and Its Application in Parallel Sorting Schemes
- Systolic Sorting on a Mesh-Connected Network
- A note on dpda transductions of {0,1}∗and inverse dpda transductions of the dyck set
- Sorting on a mesh-connected parallel computer
- Algorithm and Hardware for a Merge Sort Using Multiple Processors
- Bitonic Sort on a Mesh-Connected Parallel Computer
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