Partitioning processor arrays under resource constraints

DOI10.1023/A:1007935215591zbMATH Open0887.68004MaRDI QIDQ1376400FDOQ1376400

Lee Z. Zhang, Jürgen Teich, Lothar Thiele

Publication date: 17 December 1997

Published in: Journal of VLSI signal processing systems for signal, image and video technology (Search for Journal in Brave)

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zbMATH Keywords

integer linear programming

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Cited In (11)

• Resource-Oriented Partitioning for Multiprocessor Systems with Shared Resources
• Partitioning of processor arrays: a piecewise regular approach
• Partitioning a set of vectors with integer coordinates by means of logical hardware
• On the complexity of assembly partitioning
• Optimal allocation of requirements to parallel devices
• Partitioning and scheduling DSP applications with maximal memory access hiding
• Resource-constrained scheduling of partitioned algorithms on processor arrays
• Design of processor arrays for reconfigurable architectures
• Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
• Design of space-optimal regular arrays for algorithms with linear schedules
• On loop transformations of nested loops with affine dependencies

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