Modular adder designs using optimal reversible and fault tolerant gates in field-coupled QCA nanocomputing
DOI10.1007/S10773-018-3664-ZzbMATH Open1391.81057OpenAlexW2792759371MaRDI QIDQ1640112FDOQ1640112
Authors: Bisma Bilal, Suhaib Ahmed, Vipan Kakkar 
Publication date: 13 June 2018
Published in: International Journal of Theoretical Physics (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10773-018-3664-z
Recommendations
- Modular design of ultra-efficient reversible full adder-subtractor in QCA with power dissipation analysis
- Implementing a one-bit reversible full adder using quantum-dot cellular automata
- Design of a fault-tolerant reversible control unit in molecular quantum-dot cellular automata
- Design and power analysis of an ultra-high speed fault-tolerant full-adder cell in quantum-dot cellular automata
- Designing nanoscale counter using reversible gate based on quantum-dot cellular automata
Quantum computation (81P68) Reliability, testing and fault tolerance of networks and computer systems (68M15) Cellular automata (computational aspects) (68Q80) Fault detection; testing in circuits and networks (94C12) Quantum dots, waveguides, ratchets, etc. (81Q37) Statistical mechanics of nanostructures and nanoparticles (82D80)
Cites Work
Cited In (4)
- Design of a fault-tolerant reversible control unit in molecular quantum-dot cellular automata
- Modular design of ultra-efficient reversible full adder-subtractor in QCA with power dissipation analysis
- Design of quantum dot cellular automata based fault tolerant convolution encoders for secure nanocomputing
- Design for testability of QCA logic under stuck-at-value fault model
This page was built for publication: Modular adder designs using optimal reversible and fault tolerant gates in field-coupled QCA nanocomputing
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q1640112)
