Modular adder designs using optimal reversible and fault tolerant gates in field-coupled QCA nanocomputing

DOI10.1007/s10773-018-3664-zzbMath1391.81057OpenAlexW2792759371MaRDI QIDQ1640112

Bisma Bilal, Suhaib Ahmed, Vipan Kakkar

Publication date: 13 June 2018

Published in: International Journal of Theoretical Physics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10773-018-3664-z

zbMATH Keywords

QCAnanotechnologyadderfault tolerant designclockingquantum cellsreversible gateuniversal gate

Mathematics Subject Classification ID

Quantum computation (81P68) Fault detection; testing in circuits and networks (94C12) Cellular automata (computational aspects) (68Q80) Reliability, testing and fault tolerance of networks and computer systems (68M15) Quantum dots, waveguides, ratchets, etc. (81Q37) Statistical mechanics of nanostructures and nanoparticles (82D80)

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Design of quantum dot cellular automata based fault tolerant convolution encoders for secure nanocomputing ⋮ Modular design of ultra-efficient reversible full adder-subtractor in QCA with power dissipation analysis

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