Flow shop for dual CPUs in dynamic voltage scaling

DOI10.1016/j.tcs.2017.09.014zbMath1440.68029OpenAlexW2757905847MaRDI QIDQ1986559

Yanyan Li

Publication date: 8 April 2020

Published in: Theoretical Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.tcs.2017.09.014

zbMATH Keywords

schedulingflow shopspeed scaling

Mathematics Subject Classification ID

Analysis of algorithms (68W40) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Approximation algorithms (68W25) Wireless sensor networks as related to computer science (68M18)

Related Items (1)

Minimizing energy on homogeneous processors with shared memory

Cites Work

• Flow shop scheduling with peak power consumption constraints
• Dynamic voltage scaling under EDF revisited
• DVS scheduling in a line or a star network of processors
• Optimal two- and three-stage production schedules with setup times included
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