Evaluation of a fan out stem based fault simulation in sequential circuits

DOI10.1016/0895-7177(90)90209-6zbMATH Open0724.94020OpenAlexW2041803298MaRDI QIDQ2277239FDOQ2277239

Authors: Frederick J. Hill, Eltayeb S. Abuelyaman 

Publication date: 1990

Published in: Mathematical and Computer Modelling (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0895-7177(90)90209-6

zbMATH Keywords

fault simulation in sequential circuits

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

Cites Work

• Comparison of Parallel and Deductive Fault Simulation Methods
• A Deductive Method for Simulating Faults in Logic Circuits
• SCIRTSS: A Search System for Sequential Circuit Test Sequences

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