A flattening algorithm for hierarchical timed automata

DOI10.1007/S10598-019-09438-XMaRDI QIDQ2332032zbMATH OpenOpenAlexFDO

Authors V. V. Podymov

Publication date 31 October 2019

Published in Computational Mathematics and Modeling (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s10598-019-09438-x

zbMATH Keywords

formal verificationreal-time systemstimed automatatranslation

Mathematics Subject Classification ID

Formal languages and automata (68Q45) Specification and verification (program logics, model checking, etc.) (68Q60)

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Cites work

• Formal Methods for the Design of Real-Time Systems
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• Uppaal

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