Dominant trio of poles assignment in delayed PID control loop

DOI10.1007/978-3-319-01695-5_5MaRDI QIDQ2863183zbMATH OpenOpenAlexFDO

Authors Pavel Zítek, Jaromír Fišer, Tomáš Vyhlídal

Publication date 21 November 2013

Published in Delay Systems (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-319-01695-5_5

zbMATH Keywords

pole assignmentabsolute error integralPID controllers tuningquality of the disturbance rejection response

Mathematics Subject Classification ID

Pole and zero placement problems (93B55) Linear systems in control theory (93C05) Control/observation systems governed by ordinary differential equations (93C15)

Recommendations

• A universal map of three-dominant-pole assignment for PID controller tuning
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• scientific article; zbMATH DE number 3985070

Cites work

• scientific article; zbMATH DE number 5599308 (Why is no real title available?)
• Frequency-domain synthesis of hereditary control systems via anisochronic state space
• Mapping Based Algorithm for Large-Scale Computation of Quasi-Polynomial Zeros
• Modification of Mikhaylov Criterion for Neutral Time-Delay Systems

Cited in

(5)

• Dynamic similarity approach to control system design: delayed PID control loop
• Adaptive pole-assignment control of processes with large time delays
• Dominant pole placement for multi-loop control systems
• A universal map of three-dominant-pole assignment for PID controller tuning
• Time delay handling in dominant pole placement with PID controllers to obtain stability regions using random sampling

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