Dominant trio of poles assignment in delayed PID control loop

DOI10.1007/978-3-319-01695-5_5zbMATH Open1276.93042OpenAlexW37003280MaRDI QIDQ2863183FDOQ2863183

Authors: Pavel Zítek, Jaromír Fišer, Tomáš Vyhlídal 

Publication date: 21 November 2013

Published in: Delay Systems (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-319-01695-5_5

Recommendations

• A universal map of three-dominant-pole assignment for PID controller tuning
• Adaptive pole-assignment control of processes with large time delays
• Time delay handling in dominant pole placement with PID controllers to obtain stability regions using random sampling
• Dominant pole placement for multi-loop control systems
• scientific article; zbMATH DE number 3985070

zbMATH Keywords

pole assignmentabsolute error integralPID controllers tuningquality of the disturbance rejection response

Mathematics Subject Classification ID

Pole and zero placement problems (93B55) Linear systems in control theory (93C05) Control/observation systems governed by ordinary differential equations (93C15)

Cites Work

• Modification of Mikhaylov Criterion for Neutral Time-Delay Systems
• Mapping Based Algorithm for Large-Scale Computation of Quasi-Polynomial Zeros
• Title not available (Why is that?)
• Frequency-domain synthesis of hereditary control systems via anisochronic state space

Cited In (5)

• Time delay handling in dominant pole placement with PID controllers to obtain stability regions using random sampling
• Dynamic similarity approach to control system design: delayed PID control loop
• Dominant pole placement for multi-loop control systems
• Adaptive pole-assignment control of processes with large time delays
• A universal map of three-dominant-pole assignment for PID controller tuning

This page was built for publication: Dominant trio of poles assignment in delayed PID control loop

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q2863183)