A Switch-Level Model and Simulator for MOS Digital Systems
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Publication:3312162
DOI10.1109/TC.1984.1676408zbMath0529.94021MaRDI QIDQ3312162
Publication date: 1984
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Related Items (7)
Constructive Polychronous Systems ⋮ An optimistic ternary simulation of gate races ⋮ Efficient distributed simulation of acyclic systems ⋮ A model for synchronous switching circuits and its theory of correctness ⋮ Applying Light-Weight Theorem Proving to Debugging and Verifying Pointer Programs ⋮ On the existence of speed-independent circuits ⋮ A theory for the derivation of combination C-mos circuit designs
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