Randal E. Bryant

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Person:1426129

Available identifiers

zbMath Open bryant.randal-eMaRDI QIDQ1426129

List of research outcomes

PublicationDate of PublicationType
Generating Extended Resolution Proofs with a BDD-Based SAT Solver2023-11-03Paper
Preprocessing of propagation redundant clauses2023-10-24Paper
Preprocessing of propagation redundant clauses2022-12-07Paper
Dual proof generation for quantified Boolean formulas with a BDD-based solver2021-12-01Paper
Generating extended resolution proofs with a BDD-based SAT solver2021-08-04Paper
Chain reduction for binary and zero-suppressed decision diagrams2020-11-02Paper
Chain reduction for binary and zero-suppressed decision diagrams2019-09-16Paper
On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication2018-09-14Paper
Binary Decision Diagrams2018-07-20Paper
Predicate abstraction with indexed predicates2017-07-12Paper
Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic2017-06-13Paper
Boolean satisfiability with transitivity constraints2017-06-13Paper
Computer Aided Verification2010-04-20Paper
Computer Aided Verification2010-04-20Paper
Computer Aided Verification2010-04-20Paper
Correct Hardware Design and Verification Methods2010-02-05Paper
FST TCS 2003: Foundations of Software Technology and Theoretical Computer Science2009-08-06Paper
State-set branching: leveraging BDDs for heuristic search2009-07-17Paper
Verification, Model Checking, and Abstract Interpretation2009-05-15Paper
Formal Verification of Infinite State Systems Using Boolean Methods2008-09-25Paper
A View from the Engine Room: Computational Support for Symbolic Model Checking2008-07-15Paper
Deciding Quantifier-Free Presburger Formulas Using Parameterized Solution Bounds2007-10-11Paper
https://portal.mardi4nfdi.de/entity/Q53090342007-10-09Paper
Tools and Algorithms for the Construction and Analysis of Systems2007-09-28Paper
Deciding Bit-Vector Arithmetic with Abstraction2007-09-03Paper
On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication2007-01-09Paper
Automated Deduction – CADE-202006-11-01Paper
Computer Aided Verification2005-08-25Paper
Computer Aided Verification2005-08-25Paper
https://portal.mardi4nfdi.de/entity/Q48188012004-09-24Paper
https://portal.mardi4nfdi.de/entity/Q48188142004-09-24Paper
Effective use of Boolean satisfiability procedures in the formal verification of superscalar and VLIW microprocessors.2004-03-14Paper
https://portal.mardi4nfdi.de/entity/Q44279012003-09-14Paper
https://portal.mardi4nfdi.de/entity/Q48048872003-05-01Paper
https://portal.mardi4nfdi.de/entity/Q48048982003-05-01Paper
https://portal.mardi4nfdi.de/entity/Q45532552002-11-04Paper
Verification of arithmetic circuits using binary moment diagrams2002-07-25Paper
https://portal.mardi4nfdi.de/entity/Q27540752001-11-11Paper
Geometric characterization of series-parallel variable resistor networks1997-05-28Paper
A methodology for hardware verification based on logic simulation1995-03-30Paper
https://portal.mardi4nfdi.de/entity/Q40370951993-05-18Paper
https://portal.mardi4nfdi.de/entity/Q40373721993-05-18Paper
Graph-Based Algorithms for Boolean Function Manipulation1986-01-01Paper
https://portal.mardi4nfdi.de/entity/Q47219641986-01-01Paper
A Switch-Level Model and Simulator for MOS Digital Systems1984-01-01Paper

Research outcomes over time


Doctoral students

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