On the existence of speed-independent circuits

DOI10.1016/0304-3975(91)90024-VzbMATH Open0729.94023MaRDI QIDQ807592FDOQ807592

Authors: Carl-Johan H. Seger 

Publication date: 1991

Published in: Theoretical Computer Science (Search for Journal in Brave)

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zbMATH Keywords

gate circuitsMOS switch-level circuitsspeed-independent circuits

Mathematics Subject Classification ID

Cites Work

• On a Ternary Model of Gate Networks
• Hazard Detection in Combinational and Sequential Switching Circuits
• A Switch-Level Model and Simulator for MOS Digital Systems
• Algorithmic Aspects of MOS VLSI Switch-Level Simulation with Race Detection
• A unified framework for race analysis of asynchronous networks
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Cited In (5)

• Semi-modularity and testability of speed-independent circuits
• Title not available (Why is that?)
• Title not available (Why is that?)
• Title not available (Why is that?)
• Delay-insensitivity and ternary simulation

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