Packet Switching Networks for Multiprocessors and Data Flow Computers

DOI10.1109/TC.1984.1676373zbMATH Open0544.68030OpenAlexW2044541490MaRDI QIDQ3334073FDOQ3334073

Authors: Chi-Yuan Chin, Kai Hwang 

Publication date: 1984

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1984.1676373

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zbMATH Keywords

distribution networkmultiprocessor systemspacket switchinginterprocessor-memory networksmultistage networksdata flow computersmultipath networksmultiple paths

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Applications of graph theory to circuits and networks (94C15) Theory of operating systems (68N25)

Cited In (5)

• Network design and allocation considerations in the Hughes data-flow machine
• Switching networks for SIMD multiprocessor computing systems (state-of- the-art review)
• Multistage interconnection networks in multiprocessor systems. A simulation study
• Combining computation and data transmission in the systems with switches
• PARALLEL PROCESSING OF CONNECTION STREAMS IN NODES OF PACKET-SWITCHED COMPUTER COMMUNICATION SYSTEMS

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