Packet Switching Networks for Multiprocessors and Data Flow Computers

DOI10.1109/TC.1984.1676373MaRDI QIDQ3334073zbMATH OpenOpenAlexFDO

Authors Chi-Yuan Chin, Kai Hwang

Publication date 1984

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.1984.1676373

zbMATH Keywords

distribution networkmultiprocessor systemspacket switchinginterprocessor-memory networksmultistage networksdata flow computersmultipath networksmultiple paths

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Applications of graph theory to circuits and networks (94C15) Theory of operating systems (68N25)

Recommendations

• Multistage interconnection networks in multiprocessor systems. A simulation study
• Switching networks for SIMD multiprocessor computing systems (state-of- the-art review)
• scientific article; zbMATH DE number 4029465
• Approximation and Online Algorithms
• scientific article; zbMATH DE number 1726636

Cited in

(5)

• Network design and allocation considerations in the Hughes data-flow machine
• Switching networks for SIMD multiprocessor computing systems (state-of- the-art review)
• Multistage interconnection networks in multiprocessor systems. A simulation study
• Combining computation and data transmission in the systems with switches
• PARALLEL PROCESSING OF CONNECTION STREAMS IN NODES OF PACKET-SWITCHED COMPUTER COMMUNICATION SYSTEMS

This page was built for publication: Packet Switching Networks for Multiprocessors and Data Flow Computers

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3334073)