A complete analytic surface potential-based core model for intrinsic nanowire surrounding-gate MOSFETs
DOI10.1080/08927020802706995zbMATH Open1170.82427OpenAlexW2171404457WikidataQ58215654 ScholiaQ58215654MaRDI QIDQ3394239FDOQ3394239
Authors: Jin He, Lining Zhang, Jian Zhang, Chenyue Ma, Feilong Liu, M. S. Chan 
Publication date: 28 August 2009
Published in: Molecular Simulation (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1080/08927020802706995
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Cited In (7)
- Performance evaluation of source heterojunction strained channel gate all around nanowire transistor
- A compact quantum surface potential model for a MOSFET device
- A rigorous carrier-based analytic model for undoped ultra-thin-body silicon-on-insulator (UTB-SOI) MOSFETs
- On calculating the electric potential for 2D silicon transistor with a silicon oxide nanochannel
- Quasi two-dimensional analysis of the surface potential for poly-Si thin film transistors based on the channel potential
- Analytical drain current model for nanoscale strained‐Si/SiGe MOSFETs
- 3D analytical modeling of potential, drain current, and threshold characteristics for long-channel square gate-all-around (SGAA) MOSFETs
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