On the Emulation of Finite-Buffered Output Queued Switches Using Combined Input-Output Queuing

DOI10.1007/978-3-540-87779-0_14zbMATH Open1161.68363OpenAlexW1514332289MaRDI QIDQ3540231FDOQ3540231

Authors: Mahmoud Elhaddad, Rami Melhem 

Publication date: 20 November 2008

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-540-87779-0_14

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Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Cited In (4)

• Synchronous versus asynchronous operation of a packet switch with combined input and output queueing
• Title not available (Why is that?)
• Performance analysis of clock-regulated queues with output multiplexing in three different 2x2 crossbar switch architectures
• On the speedup required for combined input- and output-queued switching

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