Synchronous versus asynchronous operation of a packet switch with combined input and output queueing
From MaRDI portal
Publication:4022639
Recommendations
- On the speedup required for combined input- and output-queued switching
- scientific article; zbMATH DE number 2163016
- Combined asynchronous/synchronous packet switching architecture: QoS guarantees for integrated parallel computing and real-time traffic
- Packet mode and QoS algorithms for buffered crossbar switches with FIFO queuing
- Packet mode and QoS algorithms for buffered crossbar switches with FIFO queuing
- Frame-Based Packet-Mode Scheduling for Input-Queued Switches
- scientific article; zbMATH DE number 2088471
- On the Emulation of Finite-Buffered Output Queued Switches Using Combined Input-Output Queuing
- Packet-Mode Emulation of Output-Queued Switches
Cited in
(4)- Shared-per-wavelength asynchronous optical packet switching: A comparative analysis
- scientific article; zbMATH DE number 2163016 (Why is no real title available?)
- scientific article; zbMATH DE number 1717252 (Why is no real title available?)
- Combined asynchronous/synchronous packet switching architecture: QoS guarantees for integrated parallel computing and real-time traffic
This page was built for publication: Synchronous versus asynchronous operation of a packet switch with combined input and output queueing
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4022639)