Performance analysis of the SHA-3 candidates on exotic multi-core architectures

DOI10.1007/978-3-642-15031-9_19zbMATH Open1297.94054OpenAlexW1563177634MaRDI QIDQ3583463FDOQ3583463

Authors: Joppe W. Bos, Deian Stefan 

Publication date: 17 August 2010

Published in: Cryptographic Hardware and Embedded Systems, CHES 2010 (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-642-15031-9_19

Recommendations

• Developing a hardware evaluation method for SHA-3 candidates
• Lightweight implementations of SHA-3 candidates on FPGAs
• The Intel AES instructions set and the SHA-3 candidates
• Security Analysis and Comparison of the SHA-3 Finalists BLAKE, Grøstl, JH, Keccak, and Skein
• Fair and comprehensive methodology for comparing hardware performance of fourteen round two SHA-3 candidates using FPGAs

zbMATH Keywords

hash functionSHA-3Cell Broadband EngineGraphics Processing Unit

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Cryptography (94A60)

Cited In (7)

• Fair and comprehensive methodology for comparing hardware performance of fourteen round two SHA-3 candidates using FPGAs
• Side-channel analysis of six SHA-3 candidates
• XBX: external benchmarking extension for the SUPERCOP crypto benchmarking framework
• The Intel AES instructions set and the SHA-3 candidates
• Developing a hardware evaluation method for SHA-3 candidates
• Lightweight implementations of SHA-3 candidates on FPGAs
• SHA-3 on ARM11 processors

Uses Software

• CUDA

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