Elasticity and Petri Nets
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Publication:3599221
DOI10.1007/978-3-540-89287-8_13zbMath1171.68568DBLPjournals/topnoc/CortadellaKBCJ08OpenAlexW1520761694WikidataQ56892287 ScholiaQ56892287MaRDI QIDQ3599221
Michael Kishinevsky, Dmitry Bufistov, Jorge Júlvez, Jordi Cortadella, Josep Carmona
Publication date: 3 February 2009
Published in: Transactions on Petri Nets and Other Models of Concurrency I (Search for Journal in Brave)
Full work available at URL: http://hdl.handle.net/2117/126595
Uses Software
Cites Work
- On the performance evaluation of multi-guarded marked graphs with single-server semantics
- Retiming synchronous circuitry
- Compiling communicating processes into delay-insensitive VLSI circuits
- A characterization of the minimum cycle mean in a digraph
- A Scheduling Strategy for Synchronous Elastic Designs
- A Proof for the Queuing Formula: L = λW
- Performance Evaluation of Asynchronous Concurrent Systems Using Petri Nets
- Phased logic: supporting the synchronous design paradigm with delay-insensitive circuitry
- Logic Synthesis for Asynchronous Controllers and Interfaces
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