Compiling communicating processes into delay-insensitive VLSI circuits
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Publication:1102258
DOI10.1007/BF01660034zbMath0643.94039OpenAlexW2029005287MaRDI QIDQ1102258
Publication date: 1986
Published in: Distributed Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/bf01660034
VLSI circuitscommunicating processesdelay-insensitive circuitsautomatic circuit synthesisself-timed systems
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