Asynchronous datapaths and the design of an asynchronous adder

DOI10.1007/BF00464358MaRDI QIDQ685122zbMATH OpenOpenAlexFDO

Authors Alain J. Martin

Publication date 30 September 1993

Published in Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/bf00464358

zbMATH Keywords

asynchronous addersdelay-insensitive datapath circuitsripple-carry adder

Mathematics Subject Classification ID

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(5)

• CADRE: An asynchronous embedded DSP for mobile phone applications
• Delay-insensitive gate-level pipelining
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