scientific article; zbMATH DE number 3991420
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Publication:3753931
zbMATH Open0612.94017MaRDI QIDQ3753931FDOQ3753931
Authors: Hans Eveking
Publication date: 1986
Title of this publication is not available (Why is that?)
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hardware verificationspecificationgatespredicate calculussequential machinesynchronous circuitflipflops
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- Mechanical certification of systolic algorithms
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- Formal verification of timed synchronous dataflow graphs using Lustre
- Formal verification of programs specified with signal: Application to a power transformer station controller
- Documenting and verifying systems assembled from components
- Correct Hardware Design and Verification Methods
- Automatic generation of verified concurrent hardware using VHDL
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