Testing Memories for Single-Cell Pattern-Sensitive Faults

DOI10.1109/TC.1980.1675556zbMATH Open0431.94054OpenAlexW1975733849MaRDI QIDQ3869271FDOQ3869271

Authors: John P. Hayes 

Publication date: 1980

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1980.1675556

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zbMATH Keywords

fault detectionpolyominoestest generationmemory testingdesign of minimum-length test sequencespattern-sensitive faultrandom-access memory arrays

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

Cited In (8)

• Title not available (Why is that?)
• Analysis of multibackground memory testing techniques
• The repeated nondestructive march tests with variable address sequences
• A fault primitive based model of all static four-cell coupling faults in random-access memories
• Built-in self-test for folded bit-line Mbit DRAMs
• Nondestructive RAM testing by analyzing the output data for symmetry
• Dynamic neighbourhood pattern-sensitive faults in random-access memories. A fault coverage evaluation
• Address Sequences and Backgrounds with Different Hamming Distances for Multiple Run March Tests

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