scientific article; zbMATH DE number 35511
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Publication:3989986
DOI10.1002/1520-6750(199204)39:3%3C369::AID-NAV3220390307%3E3.0.CO;2-FzbMATH Open0745.90042MaRDI QIDQ3989986FDOQ3989986
Louis A. Martin-Vega, Chung-Yee Lee, Reha Uzsoy
Publication date: 28 June 1992
Title of this publication is not available (Why is that?)
heuristicsmaximum latenesssingle-machine schedulingsequence-dependent setup timesworst-case error boundsemiconductor test operations
Cites Work
Cited In (17)
- A classification of dynamic programming formulations for offline deterministic single-machine scheduling problems
- Rolling horizon algorithms for a single-machine dynamic scheduling problem with sequence-dependent setup times
- Semiconductor final-test scheduling under setup operator constraints
- A branch-and-bound algorithm for three-machine flowshop scheduling problem to minimize total completion time with separate setup times
- A sequencing problem with family setup times
- Heuristics for capacity planning problems with congestion
- Single-machine scheduling with past-sequence-dependent setup times and learning effects: a parametric analysis
- In-house development of scheduling decision support systems: case study for scheduling semiconductor device test operations
- Minimizing makespan on parallel machines with release time and machine eligibility restrictions
- Scheduling semiconductor multihead testers using metaheuristic techniques embedded with lot-specific and configuration-specific information
- Scheduling algorithms for a semiconductor probing facility
- A modified shifting bottleneck heuristic for minimizing total weighted tardiness in complex job shops
- A beam search heuristic for scheduling a single machine with release dates and sequence dependent setup times to minimize the makespan
- Scheduling of multi-spindle CNC gantry mills
- Preemptive scheduling with release dates, delivery times and sequence independent setup times
- Single-machine scheduling problems with past-sequence-dependent setup times
- Scheduling of wafer test processes in semiconductor manufacturing
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