Properties and performance bounds for timed marked graphs

DOI10.1109/81.139289zbMATH Open0825.68234OpenAlexW2153102532MaRDI QIDQ4017665FDOQ4017665

Authors: Javier Campos, Giovanni Chiola, J. M. Colom, Manuel Silva 

Publication date: 16 January 1993

Published in: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/81.139289

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

Cited In (11)

• Timed Petri nets with reset for pipelined synchronous circuit design
• Firing rate optimization of cyclic timed event graphs by token allocations
• Performance safety enforcement in strongly connected timed event graphs
• Performance safety enforcement in stochastic event graphs against boost and slow attacks
• An upper bound on the cycle time of a stochastic marked graph using incomplete information on the transition firing time distributions
• Cycle time of a P-time event graph with affine-interdependent residence durations
• Steady-state performance evaluation of continuous mono-T-semiflow Petri nets
• Cyclic scheduling for F.M.S.: Modelling and evolutionary solving approach
• Design and verification of pipelined circuits with timed Petri nets
• Timed event graph-based cyclic reconfigurable flow shop modelling and optimization
• Petri nets for the design and operation of manufacturing systems

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