scientific article; zbMATH DE number 139974

MaRDI QIDQ4028329zbMATH OpenFDO

Authors Björn Lisper, Sanjay V. Rajopadhye

Publication date 28 March 1993

zbMATH Keywords

hardware verificationdata permutation networksequivalence of hardware structuresprescheduled data transfers in processor arrayspurely local controltransfer relations

Mathematics Subject Classification ID

Circuits, networks (94C99) Specification and verification (program logics, model checking, etc.) (68Q60) General theory of computer systems (68M01)

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• An Analysis of Permutations in Arrays

Cited in

(1)

• An Analysis of Permutations in Arrays

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