New low-power tristate circuits in positive feedback source-coupled logic

DOI10.1155/2011/670508MaRDI QIDQ415808zbMATH OpenOpenAlexWikidataFDO

Authors Kirti Gupta, Ranjana Sridhar, Jaya Chaudhary, Neeta Pandey, Maneesha Gupta

Publication date 9 May 2012

Published in Journal of Electrical and Computer Engineering (Search for Journal in Brave)

Copyright license Creative Commons Attribution 4.0 International

Full work available at URL https://doi.org/10.1155/2011/670508

Mathematics Subject Classification ID

Applications of design theory to circuits and networks (94C30)

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Cites work

• Modeling and Evaluation of Positive-Feedback Source-Coupled Logic

Cited in

(3)

• Analysing the operation of the basic pass transistor structure
• Two-phase clocked CMOS adiabatic logic
• Power-delay optimization of D-latch/MUX source coupled logic gates

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