Balsa: An Asynchronous Hardware Synthesis Language

DOI10.1093/comjnl/45.1.12zbMath1002.68522OpenAlexW2035560780MaRDI QIDQ4328963

Doug Edwards, Andrew Bardsley

Publication date: 20 January 2003

Published in: The Computer Journal (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1093/comjnl/45.1.12

Mathematics Subject Classification ID

Computing methodologies and applications (68U99) Computer system organization (68M99)

Related Items (3)

Structure-based deadlock checking of asynchronous circuits ⋮ On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP ⋮ STG decomposition strategies in combination with unfolding

Uses Software

• Petrify

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