Simulating parallel architectures with BSPlab

DOI10.1007/3-540-48228-8_57MaRDI QIDQ4535970zbMATH OpenFDO

Authors Lasse Natvig

Publication date 5 November 2002

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/3-540-48228-8_57

zbMATH Keywords

BSPlabbulk synchronous parallel computing

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Computing methodologies and applications (68U99)

Recommendations

• ON SIMULATING A CLASS OF PARALLEL ARCHITECTURES
• Parallel Scientific Computation
• Practical considerations of parallel simulations and architecture independent parallel algorithm design
• WBSP: A Novel Synchronization Mechanism for Architecture Parallel Simulation
• Parallel simulation on the hypercube multiprocessor

Cited in

(4)

• Practical considerations of parallel simulations and architecture independent parallel algorithm design
• BSPlab
• Portable and architecture independent parallel performance tuning using BSP.
• Technical note

This page was built for publication: Simulating parallel architectures with BSPlab

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4535970)