A parallel Viterbi decoding algorithm
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Publication:4790973
DOI10.1002/CPE.539zbMATH Open1008.94549OpenAlexW2092021885MaRDI QIDQ4790973FDOQ4790973
Authors: J. S. Reeve 
Publication date: 4 February 2003
Published in: Concurrency and Computation: Practice and Experience (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1002/cpe.539
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Cites Work
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- Coding for the fading channel: A survey.
- Viterbi and RLS decoding for deterministic blind symbol estimation in DS-CDMA wireless communication.
- Design and implementation of a low complexity VLSI turbo-code decoder architecture for low energy mobile wireless communications
Cited In (14)
- A truncated best-path algorithm
- Viterbi decoding of the \((63,57)\) Hamming code -- implementation and performance results
- Systolic array processing of the Viterbi algorithm
- Dynamic programming in digital communications: Viterbi decoding to turbo multiuser detection
- Title not available (Why is that?)
- Interleaved convolutional code and its Viterbi decoder architecture
- Title not available (Why is that?)
- A parallel Viterbi decoder for block cyclic and convolution codes
- MAP symbol decoding in channels with error bursts
- Some VLSI decompositions of the de Bruijn graph
- An efficient cache-oblivious parallel Viterbi algorithm
- Metric based Viterbi decoder node synchronization
- Efficient computing methods for parallel processing: An implementation of the Viterbi algorithm
- An efficient parallel algorithm for list Viterbi decoding
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