scientific article; zbMATH DE number 1904861

zbMATH Open1009.68502MaRDI QIDQ4806098FDOQ4806098

Authors: Igor Ž. Milovanović, M. D. Mihajlović, I. Z. Milentijević, E. I. Milovanović 

Publication date: 5 May 2003

Title of this publication is not available (Why is that?)

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zbMATH Keywords

VLSI technologyfault-tolerant processor

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Numerical algorithms for specific classes of architectures (65Y10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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• A fault-tolerant CEQRNS processing element for linear systolic array DSP applications
• On mapping algorithms to linear and fault-tolerant systolic arrays
• Algorithmic fault tolerance for matrix operations on triangular arrays
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• Systolic computation with fault diagnosis
• Fault-tolerant schemes for some systolic systems
• A class of fault-tolerant systolic arrays for matrix multiplication
• Optimal matrix multiplication on fault-tolerant VLSI arrays
• Fault-tolerant matrix triangularizations on systolic arrays
• Algorithm based fault tolerant synthesis for linear operations
• Fault-tolerant linear systolic arrays for matrix-vector multiplication
• Mapping matrix multiplication algorithm onto fault-tolerant systolic array

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