FOLDING TRANSFORMATIONS ON SYSTOLIC AND VLSI PROCESSOR ARRAYS
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Publication:4820052
DOI10.1080/10637199408915467zbMath1049.68968MaRDI QIDQ4820052
Publication date: 6 October 2004
Published in: Parallel Algorithms and Applications (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1080/10637199408915467
68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)
65Y10: Numerical algorithms for specific classes of architectures
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