Implementation of folding transformations on linear VSLI processor arrays

DOI10.1016/0167-8191(92)90088-OzbMath0792.68001OpenAlexW1966275412MaRDI QIDQ1195159

Marjan Gušev, David J. Evans

Publication date: 7 October 1992

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-8191(92)90088-o

zbMATH Keywords

data dependencesystolic arrayprocessor arrayalgorithm transformationfolding transformationinterlocking translationpartitioned linear transformationsymmetric mapping

Mathematics Subject Classification ID

Distributed algorithms (68W15) General theory of computer systems (68M01)

Related Items (5)

FOLDING TRANSFORMATIONS ON SYSTOLIC AND VLSI PROCESSOR ARRAYS ⋮ FOLDING TECHNIQUES FOR SYSTOLIC ITERATIONS ⋮ INTERLOCKING PROPERTIES OF THE LINEAR DATA DEPENDENCE METHOD ⋮ THE MAGIC OF INTERLOCKING PROPERTY: FAST SYSTOLIC DESIGN ⋮ Matrix-vector multiplication on a fixed-size linear systolic array

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