THE MAGIC OF INTERLOCKING PROPERTY: FAST SYSTOLIC DESIGN

DOI10.1080/10637199708915617zbMATH Open0873.68089OpenAlexW2094998497MaRDI QIDQ3130159FDOQ3130159

Authors: D. J. Evans, M. Gušev 

Publication date: 28 May 1997

Published in: Parallel Algorithms and Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1080/10637199708915617

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zbMATH Keywords

systolic arraysinterlocking property

Mathematics Subject Classification ID

Graph theory (including graph drawing) in computer science (68R10) Distributed algorithms (68W15) Computer system organization (68M99)

Cites Work

• Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
• A family of new efficient arrays for matrix multiplication
• Title not available (Why is that?)
• New linear systolic arrays for digital filters and convolution
• Implementation of folding transformations on linear VSLI processor arrays
• New linear systolic arrays for the string comparison algorithm
• Fast linear systolic matrix vector multiplication
• Folding transformations for processor arrays
• FOLDING TRANSFORMATIONS ON SYSTOLIC AND VLSI PROCESSOR ARRAYS

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