Radix-8 Booth Encoded Modulo 2 ^{n} -1 Multipliers With Adaptive Delay for High Dynamic Range Residue Number System

DOI10.1109/TCSI.2010.2092133zbMATH Open1468.94410OpenAlexW2117651800MaRDI QIDQ5010602FDOQ5010602

Authors: Ramya Muralidharan, Chip-Hong Chang 

Publication date: 26 August 2021

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tcsi.2010.2092133

Mathematics Subject Classification ID

Cryptography (94A60) Algebraic coding theory; cryptography (number-theoretic aspects) (11T71)

Cited In (4)

• Method for designing efficient mixed radix multipliers
• Residue-to-binary conversion for general moduli sets based on approximate Chinese remainder theorem
• Circuit level realization of low latency radix-4 Booth scheme for parallel multipliers
• Highly parallel modular multiplier for elliptic curve cryptography in residue number system

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