Reversing Stealthy Dopant-Level Circuits

DOI10.1007/978-3-662-44709-3_7zbMATH Open1383.94044OpenAlexW2065181350MaRDI QIDQ5265076FDOQ5265076

Shigeaki Tawa, Ryoichi Fujii, Ryohei Hori, Takeshi Fujino, Mitsuru Shiozaki, Daisuke Suzuki, Takeshi Sugawara

Publication date: 21 July 2015

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-662-44709-3_7

zbMATH Keywords

Chip reverse engineeringLSI failure analysisPassive voltage contrastStealthy dopant-level trojan

Mathematics Subject Classification ID

Cryptography (94A60)

Cited In (2)

• Differential Fault Attack on Grain v1, ACORN v3 and Lizard
• A note on detecting sneak paths in transistor networks

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