On a New Mechanism of Trigger Generation for Post-Silicon Debugging

DOI10.1109/TC.2013.107MaRDI QIDQ5268080zbMATH OpenOpenAlexFDO

Authors M. H. Neishaburi, Zeljko Zilic

Publication date 20 June 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2013.107

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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Cited in

(1)

• Mapping Trigger Conditions onto Trigger Units during Post-silicon Validation and Debugging

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