Implementation of floating point arithmetics using an FPGA

DOI10.1007/978-1-4020-5678-9_39zbMATH Open1126.68302OpenAlexW324418261MaRDI QIDQ5433993FDOQ5433993

Authors: Suhap Sahin, Adnan Kavak, Yasar Bercerikli, H. Engin Demiray 

Publication date: 9 January 2008

Published in: Mathematical Methods in Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-1-4020-5678-9_39

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zbMATH Keywords

artificial neural networksfloating point arithmeticfield programmable gatearrays

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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