scientific article; zbMATH DE number 1941116

zbMATH Open1020.68864MaRDI QIDQ4408166FDOQ4408166

Brent Nelson, Eric Roesler

Publication date: 29 June 2003

Full work available at URL: http://link.springer.de/link/service/series/0558/bibs/2438/24380637.htm

Title of this publication is not available (Why is that?)

Recommendations

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Mathematics Subject Classification ID

Computing methodologies and applications (68U99)

Cited In (8)

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• Performance evaluation and optimal design for FPGA-based digit-serial DSP functions
• Implementation of floating point arithmetics using an FPGA
• Title not available (Why is that?)
• Low-Cost Binary128 Floating-Point FMA Unit Design with SIMD Support
• Energy-Efficient Floating-Point Unit Design
• A low power approach to floating point adder design for DSP application
• On the design of IEEE compliant floating point units

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