Novel optimizations for hardware floating-point units in a modern FPGA architecture (Q4408166)
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scientific article; zbMATH DE number 1941116
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| English | Novel optimizations for hardware floating-point units in a modern FPGA architecture |
scientific article; zbMATH DE number 1941116 |
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29 June 2003
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0.7443200349807739
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0.7374207377433777
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0.7346628308296204
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0.7232508063316345
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Novel optimizations for hardware floating-point units in a modern FPGA architecture (English)
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