Boosting AES Performance on a Tiny Processor Core

DOI10.1007/978-3-540-79263-5_11MaRDI QIDQ5458939zbMATH OpenOpenAlexFDO

Authors Stefan Tillich, Christoph Herbst

Publication date 24 April 2008

Published in Topics in Cryptology – CT-RSA 2008 (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-540-79263-5_11

zbMATH Keywords

hardware-software codesignAdvanced Encryption Standard8-bit microcontrollerinstruction set extensionsAVR architecture

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Cryptography (94A60)

Recommendations

• AES smaller than S-box
• AES Software Implementations on ARM7TDMI
• Atomic-AES: a compact implementation of the AES encryption/decryption core
• All the AES you need on Cortex-M3 and M4
• scientific article; zbMATH DE number 1979282

Cites work

• scientific article; zbMATH DE number 1682693 (Why is no real title available?)
• A Very Compact S-Box for AES
• VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-Bit Processors

Cited in

(10)

• Intel’s New AES Instructions for Enhanced Performance and Security
• AES smaller than S-box
• Atomic-AES: a compact implementation of the AES encryption/decryption core
• scientific article; zbMATH DE number 1979276 (Why is no real title available?)
• Accelerating the AES encryption function in openSSL for embedded systems
• AES Software Implementations on ARM7TDMI
• A More Compact AES
• FACE-LIGHT: fast AES-CTR mode encryption for low-end microcontrollers
• Implementation of symmetric algorithms on a synthesizable 8-bit microcontroller targeting passive RFID tags
• Block cipher speed and energy efficiency records on the MSP430: system design trade-offs for 16-bit embedded applications

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