A Very Compact S-Box for AES
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Publication:3522145
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Cited in
(48)- On the performance of one perspective LSX-based block cipher
- How fast can higher-order masking be in software?
- Cryptanalysis of CLEFIA using differential methods with cache trace patterns
- Forced Independent Optimized Implementation of 4-Bit S-Box
- AES smaller than S-box
- All the AES you need on Cortex-M3 and M4
- Uniform first-order threshold implementations
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- Side-channel cryptographic attacks using pseudo-Boolean optimization
- $\textnormal{\textsc{TWINE}}$: A Lightweight Block Cipher for Multiple Platforms
- scientific article; zbMATH DE number 1979283 (Why is no real title available?)
- Pushing the limits: a very compact and a threshold implementation of AES
- A More Compact AES
- Quantum reversible circuit of AES-128
- A Tale of Two Shares: Why Two-Share Threshold Implementation Seems Worthwhile—and Why It Is Not
- Efficient systolic multiplications in composite fields for cryptographic systems
- A Very Compact “Perfectly Masked” S-Box for AES
- Fast Software Encryption
- Improved upper bounds for the expected circuit complexity of dense systems of linear equations over \(\mathrm{GF}(2)\)
- Constructions of Iterative Near-MDS Matrices with the Lowest XOR Count
- Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches
- Quantum circuit implementations of AES with fewer qubits
- A first-order SCA resistant AES without fresh randomness
- New quantum circuit implementations of SM4 and SM3
- AES side-channel countermeasure using random tower field constructions
- Using Normal Bases for Compact Hardware Implementations of the AES S-Box
- Secure hardware implementation of nonlinear functions in the presence of glitches
- An Efficient Side-Channel Protected AES Implementation with Arbitrary Protection Order
- A survey of some recent bit-parallel \(\mathrm{GF}(2^n)\) multipliers
- Cancellation-free circuits in unbounded and bounded depth
- Optimized quantum implementation of AES
- Boosting AES Performance on a Tiny Processor Core
- Mixed bases for efficient inversion in \({\mathbb F}_{((2^2)^2)^2}\) and conversion matrices of \texttt{SubBytes} of AES
- Homomorphic AES evaluation using the modified LTV scheme
- Spin me right round rotational symmetry for FPGA-specific AES: extended version
- A new algorithm to construct secure keys for AES
- Some efficient quantum circuit implementations of Camellia
- One AES S-box to increase complexity and its cryptanalysis
- Small low-depth circuits for cryptographic applications
- Fully homomorphic SIMD operations
- Implementation of the AES-128 on Virtex-5 FPGAs
- Exploring energy efficiency of lightweight block ciphers
- A stream/block combination image encryption algorithm using logistic matrix to scramble
- How fast can SM4 be in software?
- Atomic-AES: a compact implementation of the AES encryption/decryption core
- A New Design of Substitution Box with Ideal Strict Avalanche Criterion
- ALE: AES-based lightweight authenticated encryption
- Logic minimization techniques with applications to cryptology
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