Correct Hardware Design and Verification Methods
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Publication:5897072
Recommendations
Cited in
(7)- Static consistency checking for Verilog wire interconnects
- scientific article; zbMATH DE number 1751924 (Why is no real title available?)
- scientific article; zbMATH DE number 1390341 (Why is no real title available?)
- scientific article; zbMATH DE number 1948412 (Why is no real title available?)
- Insertion semantics of VHDL as electronic design languge
- Verification, Model Checking, and Abstract Interpretation
- Abstract Interpretation of the Physical Inputs of Embedded Programs
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