A new bit-serial multiplier over GF(pm) using irreducible trinomials

DOI10.1016/J.CAMWA.2009.12.034MaRDI QIDQ604106zbMATHOpenAlexFDO

Authors Nam Su Chang, Tae Hyun Kim, Chang Han Kim, Dong-Guk Han, Jong-In Lim

Publication date 8 November 2010

Published in Computers & Mathematics with Applications (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/j.camwa.2009.12.034

zbMATH Keywords

finite fieldpairing-based cryptographybit-serial multiplierirreducible trinomial

Mathematics Subject Classification ID

Cryptography (94A60) Algebraic coding theory; cryptography (number-theoretic aspects) (11T71)

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Cites work

• scientific article; zbMATH DE number 1962149 (Why is no real title available?)
• scientific article; zbMATH DE number 1979307 (Why is no real title available?)
• A Coprocessor for the Final Exponentiation of the η T Pairing in Characteristic Three
• Efficient Hardware for the Tate Pairing Calculation in Characteristic Three
• Efficient hardware implementation of finite fields with applications to cryptography
• Hardware Acceleration of the Tate Pairing in Characteristic Three
• Progress in Cryptology - INDOCRYPT 2003

Cited in

(2)

• scientific article; zbMATH DE number 1962149 (Why is no real title available?)
• Novel hybrid-size digit-serial systolic multiplier over \(\mathrm{GF}(2^m)\)

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